The Chevin Technology SATA-HC IP block simplifies the integration of high capacity SSDs at 1.5/3/6Gbit/s using Xilinx FPGAs.
Combined low-latency and high throughput is achieved by accessing the SSD directly from FPGA logic with no external circuitry.
The lower protocol layers Phy/Link/Transport all-RTL solution provides minimum access time and the shortest path between SSD and application
- Evaluate on Alpha Data ADM KU3 Board.
- Data storage and capture systems
- Flash Store for Big Data Analytics
- Very large data set Signal processing/ Image processing
- Fast Hash look-ups
- Test equipment
- SATA 3.0 compliant
- High Throughput read/write @ 500MByte/s
- High reliability, 32bit CRC, request/resend
- PHY/Link/Trans layers in RTL
- Low latency, SATA commands < 1 us
- Auto negotiation
- Small Footprint 3042 LUTs (lower layers)
- Easy to integrate, single clock domain