Chevin Technology’s TCP/IP Offload Engine is an FPGA Synthesisable Ethernet TCP/IP server/client in a lean and fast, all-RTL solution.
The TCP/ IP can be used with both 10G & 25G Ethernet IP cores for reliable, low-latency connectivity in any FPGA using a minimum of resources. Chevin Technology’s TCP/IP offloads the TCP protocol using fast and efficient logic for checksum calculation, and is easily integrated alongside other protocols to provide an easy path for the development of TCP enabled FPGA applications.
Valuable resources in your application are freed up by the TCP/IP which offloads the entire TCP stack onto an FPGA logic
Applications such as a Host CPU or another FPGA function can take advantage of these features and quickly add blazing fast 10G Ethernet connectivity
- 1 to 256 Simultaneous connections
- Server/Client roles, configurable per connection
- Hash table based filtering for minimum latency
- Low-jitter sustained high throughput performance
- Programmable per connection receive/congestion window
- Monitoring function, “bump-in-the-wire” inspection, non-intrusive packet analysis
- Cut-through mode for absolute highest throughput and lowest latency
- Store-and-Forward mode ensures ultimate safety in verified data to and from the application
- 64-bit AXI4 stream @ 156.25 MHz
- Configurable TX & RX buffer size: 1KB-1GB
Lower Layer IP Blocks PHY Side